Military seeks to start domestic research center for 3DHI microelectronics development

ARLINGTON, Va. – U.S. military electronics experts are reaching out to industry for information to help them establish a domestic research center for fabrication of three-dimensional heterogeneously integrated (3DHI) microsystems. Officials of the U.S. Defense Advanced Research Projects Agency in Arlington, Va., issued a request for information on Friday (DARPA-SN-23-84) for the Establishing a Domestic Center for R&D and Manufacturing 3-D Heterogeneous Integration (3DHI) Microsystems project.

Source: research center 3DHI manufacturing | Military Aerospace

Global Silicon Wafer Shipment Growth to Bounce Back in 2024 

MILPITAS, Calif. ─ October 26, 2023 ─ Global shipments of silicon wafers are projected to decline 14% in 2023, to 12,512 million square inches (MSI) from the record high of 14,565 MSI in 2022 before bouncing back in 2024 as wafer and semiconductor demand recovers and inventory levels normalize, SEMI reported today in its annual silicon shipment forecast. Continuing softness in demand for semiconductors and challenging macroeconomic conditions are driving the 2023 decline.

Source: Global Silicon Wafer Shipment Growth to Bounce Back in 2024 After 2023 Decline, SEMI Reports | SEMI

Gearing Up For Hybrid Bonding

Hybrid bonding is becoming the preferred approach to making heterogeneous integration work, as the semiconductor industry shifts its focus from 2D scaling to 3D scaling. By stacking chip-lets vertically in direct wafer-to-wafer bonds, chipmakers can leapfrog attainable interconnection pitch from 35µm in copper micro-bumps to 10µm or less. That reduces signal delay to negligible levels and enables smaller, thinner packages with faster memory/processor speeds — and all of this while consuming less power.

Source: Gearing Up For Hybrid Bonding

NIST Wants to Use Atoms to Combat Counterfeit Electronics 

The global semiconductor shortage has opened the door for criminals who want to cash in on the scarcity of these valuable components. According to the Wall Street Journal, this has pushed some buyers to take risks that they may not have even considered before.

Source: NIST Wants to Use Atoms to Combat Counterfeit Electronics | Source Today

Why Wafer Bumps Are Suddenly So Important

Wafer bumps need to be uniform in height to facilitate subsequent manufacturing steps, but a push for 100% inspection in packaging in mission-critical markets is putting a strain on existing measurement technologies.

Source: Why Wafer Bumps Are Suddenly So Important

Chiplets: A Short History 

In another “rabbit hole moment,” I lost myself in a bout of reminiscence on the Internet Archive’s Wayback Machine. A prehistoric SemiSerious blog post from 2009 attempted to provide updates from ISSCC 2009. TechInsights engineers Aaron Murray, James Bull, and Mohammad Ahmad provided the boots on the ground reports to HQ. I believe these three fine gentlemen all continue their yeoman’s work at the Ottawa company.

Source: Chiplets: A Short History | EE Times

Micross Components and SemiQ Sign Global Bare Die Distribution Agreement

Orlando, FL, October 15, 2020 – Micross Components, Inc. (“Micross”), the world’s largest supplier of value-added bare die and a leading global mission-critical microelectronic components and services provider for high-reliability markets and SemiQ, Inc., a developer and manufacturer of silicon carbide (SiC) power devices, modules and epitaxial wafers have signed a new agreement establishing Micross as an authorized worldwide supplier of SemiQ SiC products offered in Die Form.

Source: Micross Components and SemiQ Sign Global Bare Die Distribution Agreement – Micross

Intel Wins US Government Advanced Packaging Project 

SANTA CLARA, Calif.–(BUSINESS WIRE)– What’s New: The U.S. Department of Defense has awarded Intel Federal LLC the second phase of its State-of-the-Art Heterogeneous Integration Prototype (SHIP) program. The SHIP program enables the U.S. government to access Intel’s state-of-the-art semiconductor packaging capabilities in Arizona and Oregon and take advantage of capabilities created by Intel’s tens of billions of dollars of annual R&D and manufacturing investment.

Source: Intel Wins US Government Advanced Packaging Project | Seeking Alpha

Momentum Builds For Advanced Packaging

The semiconductor industry is stepping up its efforts in advanced packaging, an approach that is becoming more widespread with new and complex chip designs.Foundries, OSATs and others are rolling out the next wave of advanced packaging technologies, such as 2.5D/3D, chiplets and fan-out, and they are developing more exotic packaging technologies that promise to improve performance, reduce power, and improve time to market. Each package type is different, with various tradeoffs. As before, the idea behind advanced packaging is to assemble complex dies in a package, creating a system-level design. But advanced packaging faces some technical and cost challenges.

Source: Momentum Builds For Advanced Packaging

Survey in 3D Electronics Alternative to PCBs 

Mention an electronic circuit and you are likely to picture a printed circuit board (PCB): a rigid rectangle in a characteristic green color with copper lines and a bewildering array of components soldered onto it. But does adding electronic functionality means using a PCB and thus requires shoehorning a rigid rectangle into the product?

Source: Survey in 3D Electronics Alternative to PCBs – Passive Components Blog

Micross AIT Receives DMEA Microelectronics Trusted Source Certification 

Orlando, FL, January 15, 2020 – Micross is pleased to announce that its Advanced Interconnect Technology operation (Micross AIT) located in Research Triangle Park, North Carolina has been accredited by the Defense Microelectronics Activity (DMEA) as a Microelectronics Trusted Source for Post CMOS Processing Services (Category 1A) effective December 13, 2019.

Source: Micross Advanced Interconnect Technology Receives DMEA Microelectronics Trusted Source Certification – Micross

Choosing Between 2D and 3D Materials for Next-Gen Semiconductors 

Researchers at Pohang University of Science and Technology (POSTECH) exploit resistive switching property in halide perovskite materials to develop the basis for a new type of fast, low-power, nonvolatile memory. Halide perovskite materials exhibit a resistive switching property, which means that with the application of a voltage, the substance’s resistance will change.

Source: Choosing Between 2D and 3D Materials to Set Off the Commercialization of Next-Gen Semiconductors – News